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The term "device" is used to classify models that can operate without interactive assistance from the test process thread. The memory model presented in the previous section is an example of a "device" model. The test process did not need to call any of the methods provided by the software model for the model to function correctly. This section presents a second example of a "device" model, a serial codec. However, unlike the memory model which is a complete implementation, the codec model is only partially implemented. The test writer must implement some of the methods to create a full implementation.
The hardware model presented in this section models an integrated analogue to digital and digital to analogue converter called a codec (coder-decoder). The digital to analogue converter converts a temporal sequence of digital values into an analogue signal. The logical communication channel used to send digital sample data to the codec is known as the write channel. The analogue to digital converter regularly samples an analogue signal, digitizing each sampled value to produce a temporal sequence of digital values. The logical communication channel used to receive digital sample data generated by the codec is known as the read channel. The hardware model is used to ensure that digital data samples are transfered to the codec correctly, and to provide a sequence of digital data samples generated by the codec. The hardware model simulates the operation of the read and write channels by implementing the serial interface is used to transfer digital sample data to and from the codec.
Figure 3.2.1(a): Example Codec Model
The serial interface consists of four signals. The "clock" signal is used to synchronize the other signals in the interface which may only change state at the rising edge of the clock. The "data_in" signal is used to send write channel sample data to the codec bit by bit. The "data_out" signal is used to transfer read channel sample data from the codec bit by bit. Each data sample is a 16 bit value, transfered 1 bit per clock cycle, from MSB to LSB. The "sync" signal is used to initiate each read and write channel data transfer by pulsing the "sync" signal high, one cycle before the first bit of data is transfered.
Figure 3.2.1(b): Example Codec Timing
| SMI Model: | codec | |
|---|---|---|
| Parameter: | INSTANCE | SMI instance name. |
| Clock Domains: | clock | All signals switch on posedge "clock" unless stated otherwise. |
| Inputs: | clock | Clock signal. |
| sync | This signal is used to initiate the serial transfer of data words on both the read and write channels. The signal should be asserted one cycle before the first data bits are transfered. | |
| data_in | This signal is used to serially transmit write channel data words from an external hardware source to the software model. Data bits are sent MSB to LSB starting one cycle after the "sync" signal is asserted. | |
| Outputs: | data_out | This signal is used to serially transmit read channel data words to an external hardware source from the software model. Data bits are sent MSB to LSB starting one cycle after the "sync" signal is asserted. |
At start up, the hardware model instance is initialized. As the bit width of the sample data is fixed at 16, the software model instance does not need to be configured with this information, so no configuration message is sent. A more flexible implementation would allow for a configurable bit width.
The model is initially in an idle state, sampling the "sync" signal until a sync pulse is detected. If a sync pulse is detected a bit counter starts counting down from 16 down to 0, subtracting 1 from the count each clock period following the detection of the sync pulse. At the beginning of this sequence, read channel data is read from the software model instance by sending a "Read" message and receiving a "Data" message in reply. The sample value contained in the reply is stored and the value of the bit indexed by the bit counter is used to drive the "data_out" signal until the entire data word has been serially transmitted. At the same time, the "data_in" signal is sampled each clock and stored in a register indexed by the bit counter. These single bit registers form a 16 bit word which contains the write channel data sample when the bit counter reaches zero. At this point the write channel data sample is sent to the software model in a "Write" message. After both read and write sample data have been transfered, the model returns to its idle state.
| Source: | codec.v |
|---|
| Name | Type | Content | Reply |
|---|---|---|---|
| Read | HS-R | [DEV_READ] | Data |
| Write | HS-W | [DEV_WRITE, <data>] | |
| Data | SM-R | [<data>] |
Constants "DEV_READ" and "DEV_WRITE" are used to identify the two types of message, "Read" and "Write", that can be sent from the hardware to the software model instance. The hardware model instance fetches read channel data from the software model instance by sending a "Read" message. The software model instance replies with a "Data" message. The hardware model instance sends write channel data to the software model instance by sending a "Write" message.
| Message: | Read | |
|---|---|---|
| Reply: | Data | Value of the next read channel word. |
| Description: | This message is used to read a data word from the read channel. | |
| Message: | Write | |
|---|---|---|
| Content: | data | Value to be written to the write channel. |
| Description: | This message is used to write a data word to the write channel. | |
| Message: | Data | |
|---|---|---|
| Content: | data | Value of the read channel word. |
| Description: | This reply message returns read channel data back to the hardware simulation. | |
Figure 3.2.3: Example Codec class
This class is a partial implementation of an SMI model of a codec. The model and instance name are both "codec", which is registered in the constructor. The software model instance receives a sequence of write channel data samples from the hardware model instance. The software model instance sends a sequence of read channel data samples to the hardware model instance. These data samples are 16 bit binary words (no 'x' or 'z' bits are not allowed).
The codec model is implemented as a base class as the methods adcData() and dacData() are left un-implemented. To create a concrete class, i.e. one that can be used to create objects, the base codec class must be subclassed and the methods adcData() and dacData() must be implemented. The adcData() method is invoked by the process() method to obtain the next data sample in the sequence sent to the read channel. The dacData() method is invoked by the process() method to store the next data sample in the sequence received via to the write channel. The test writer needs to determine how these sample sequences should be handled.
| Source: | codec.h |
|---|---|
| codec.cc |
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